#ifndef _STREAMS_CFG_H
#define _STREAMS_CFG_H

//******************************************** Включаемые файлы *********************************************

#include "lmcal_exmc.h"


//************************************ Глобальные (публичные) константы *************************************

// todo - перенести сюда канал управления зеленым светодиодом


//-----------------------------------------------------------------------------------------------------------
// Каналы STREAM IN
//-----------------------------------------------------------------------------------------------------------

// Максимальное количество каналов ПЛИС
// Доступные значения: 1..16
#define STREAM_IN_CH_QTY        (1)

// Канал SDIO для потока на ввод
#define STREAM_IN_SDIO_CH           (LMCAL_SDIO_CHANNEL1)
#define STREAM_IN_SDIO_BLK_SIZE     (64) // 256 байт в словах (/4)


// Указатель на кольцевой буфер в памяти МК
#define STREAM_IN_CH0_RB_BUF           (lmcal_exmc_ch0_buf)
// Размер буфера
#define STREAM_IN_CH0_RB_SIZE          (LMCAL_EXMC_CH0_SIZE)
// Минимальный свободный размер буфера
#define STREAM_IN_CH0_RB_MIN_FSIZE     (64) // 256 байт в словах (/4)
// Адрес буфера в ПЛИС
// Используется старший байт адреса [31...24] - Номер буфера (до 64)
#define STREAM_IN_CH0_MMC_ADDR         (0x00000000)


#define STREAM_IN_CH1_RB_BUF           (lmcal_exmc_ch1_buf)
#define STREAM_IN_CH1_RB_SIZE          (LMCAL_EXMC_CH1_SIZE)
#define STREAM_IN_CH1_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH1_MMC_ADDR         (0x01000000)

#define STREAM_IN_CH2_RB_BUF           (lmcal_exmc_ch2_buf)
#define STREAM_IN_CH2_RB_SIZE          (LMCAL_EXMC_CH2_SIZE)
#define STREAM_IN_CH2_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH2_MMC_ADDR         (0x02000000)

#define STREAM_IN_CH3_RB_BUF           (lmcal_exmc_ch3_buf)
#define STREAM_IN_CH3_RB_SIZE          (LMCAL_EXMC_CH3_SIZE)
#define STREAM_IN_CH3_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH3_MMC_ADDR         (0x03000000)

#define STREAM_IN_CH4_RB_BUF           (lmcal_exmc_ch4_buf)
#define STREAM_IN_CH4_RB_SIZE          (LMCAL_EXMC_CH4_SIZE)
#define STREAM_IN_CH4_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH4_MMC_ADDR         (0x04000000)

#define STREAM_IN_CH5_RB_BUF           (lmcal_exmc_ch5_buf)
#define STREAM_IN_CH5_RB_SIZE          (LMCAL_EXMC_CH5_SIZE)
#define STREAM_IN_CH5_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH5_MMC_ADDR         (0x05000000)

#define STREAM_IN_CH6_RB_BUF           (lmcal_exmc_ch6_buf)
#define STREAM_IN_CH6_RB_SIZE          (LMCAL_EXMC_CH6_SIZE)
#define STREAM_IN_CH6_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH6_MMC_ADDR         (0x06000000)

#define STREAM_IN_CH7_RB_BUF           (lmcal_exmc_ch7_buf)
#define STREAM_IN_CH7_RB_SIZE          (LMCAL_EXMC_CH7_SIZE)
#define STREAM_IN_CH7_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH7_MMC_ADDR         (0x07000000)

#define STREAM_IN_CH8_RB_BUF           (lmcal_exmc_ch8_buf)
#define STREAM_IN_CH8_RB_SIZE          (LMCAL_EXMC_CH8_SIZE)
#define STREAM_IN_CH8_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH8_MMC_ADDR         (0x08000000)

#define STREAM_IN_CH9_RB_BUF           (lmcal_exmc_ch9_buf)
#define STREAM_IN_CH9_RB_SIZE          (LMCAL_EXMC_CH9_SIZE)
#define STREAM_IN_CH9_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH9_MMC_ADDR         (0x09000000)

#define STREAM_IN_CH10_RB_BUF           (lmcal_exmc_ch10_buf)
#define STREAM_IN_CH10_RB_SIZE          (LMCAL_EXMC_CH10_SIZE)
#define STREAM_IN_CH10_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH10_MMC_ADDR         (0x0A000000)

#define STREAM_IN_CH11_RB_BUF           (lmcal_exmc_ch11_buf)
#define STREAM_IN_CH11_RB_SIZE          (LMCAL_EXMC_CH11_SIZE)
#define STREAM_IN_CH11_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH11_MMC_ADDR         (0x0B000000)

#define STREAM_IN_CH12_RB_BUF           (lmcal_exmc_ch12_buf)
#define STREAM_IN_CH12_RB_SIZE          (LMCAL_EXMC_CH12_SIZE)
#define STREAM_IN_CH12_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH12_MMC_ADDR         (0x0C000000)

#define STREAM_IN_CH13_RB_BUF           (lmcal_exmc_ch13_buf)
#define STREAM_IN_CH13_RB_SIZE          (LMCAL_EXMC_CH13_SIZE)
#define STREAM_IN_CH13_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH13_MMC_ADDR         (0x0D000000)

#define STREAM_IN_CH14_RB_BUF           (lmcal_exmc_ch14_buf)
#define STREAM_IN_CH14_RB_SIZE          (LMCAL_EXMC_CH14_SIZE)
#define STREAM_IN_CH14_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH14_MMC_ADDR         (0x0E000000)

#define STREAM_IN_CH15_RB_BUF           (lmcal_exmc_ch15_buf)
#define STREAM_IN_CH15_RB_SIZE          (LMCAL_EXMC_CH15_SIZE)
#define STREAM_IN_CH15_RB_MIN_FSIZE     (64)
#define STREAM_IN_CH15_MMC_ADDR         (0x0F000000)


//-----------------------------------------------------------------------------------------------------------
// Каналы STREAM OUT
//-----------------------------------------------------------------------------------------------------------



//-----------------------------------------------------------------------------------------------------------
// Регистры
//-----------------------------------------------------------------------------------------------------------

//-----------------------
// Storage regs
//-----------------------
// Submodule registers
#define FPGA_REG_STORAGE_MASK          (0x3000) // номер блока - b"11000" проболжение (9 бит) b"0_0000_0000"
// STS
#define FPGA_REG_STORAGE_STS1          (FPGA_REG_STORAGE_MASK | 0x0000) // full
#define FPGA_REG_STORAGE_STS2          (FPGA_REG_STORAGE_MASK | 0x0001) // mid
#define FPGA_REG_STORAGE_STS3          (FPGA_REG_STORAGE_MASK | 0x0002) // empty
//


//SIZE
#define FPGA_REG_STORAGE_SIZE0         (FPGA_REG_STORAGE_MASK | 0x0003)
#define FPGA_REG_STORAGE_SIZE1         (FPGA_REG_STORAGE_MASK | 0x0004)
#define FPGA_REG_STORAGE_SIZE2         (FPGA_REG_STORAGE_MASK | 0x0005)
#define FPGA_REG_STORAGE_SIZE3         (FPGA_REG_STORAGE_MASK | 0x0006)
#define FPGA_REG_STORAGE_SIZE4         (FPGA_REG_STORAGE_MASK | 0x0007)
#define FPGA_REG_STORAGE_SIZE5         (FPGA_REG_STORAGE_MASK | 0x0008)
#define FPGA_REG_STORAGE_SIZE6         (FPGA_REG_STORAGE_MASK | 0x0009)
#define FPGA_REG_STORAGE_SIZE7         (FPGA_REG_STORAGE_MASK | 0x000A)
#define FPGA_REG_STORAGE_SIZE8         (FPGA_REG_STORAGE_MASK | 0x000B)
#define FPGA_REG_STORAGE_SIZE9         (FPGA_REG_STORAGE_MASK | 0x000C)
#define FPGA_REG_STORAGE_SIZE10        (FPGA_REG_STORAGE_MASK | 0x000D)
#define FPGA_REG_STORAGE_SIZE11        (FPGA_REG_STORAGE_MASK | 0x000E)
#define FPGA_REG_STORAGE_SIZE12        (FPGA_REG_STORAGE_MASK | 0x000F)
#define FPGA_REG_STORAGE_SIZE13        (FPGA_REG_STORAGE_MASK | 0x0010)
#define FPGA_REG_STORAGE_SIZE14        (FPGA_REG_STORAGE_MASK | 0x0011)
#define FPGA_REG_STORAGE_SIZE15        (FPGA_REG_STORAGE_MASK | 0x0012)

#define FPGA_REG_STORAGE_CLR1          (FPGA_REG_STORAGE_MASK | 0x0014)



//-----------------------
// Format regs
//-----------------------
// Submodule registers
#define FPGA_REG_FORMAT_MASK            (0x3200) // номер блока - b"11001"

#define FPGA_REG_FORMAT_CTRL1           (FPGA_REG_FORMAT_MASK | 0x0000)
//
#define FPGA_FIFO_0_EN_MASK             (0x00000001)
#define FPGA_FIFO_1_EN_MASK             (0x00000002)
#define FPGA_FIFO_2_EN_MASK             (0x00000004)
#define FPGA_FIFO_3_EN_MASK             (0x00000008)

#define FPGA_FIFO_4_EN_MASK             (0x00000010)
#define FPGA_FIFO_5_EN_MASK             (0x00000020)
#define FPGA_FIFO_6_EN_MASK             (0x00000040)
#define FPGA_FIFO_7_EN_MASK             (0x00000080)

#define FPGA_FIFO_8_EN_MASK             (0x00000100)
#define FPGA_FIFO_9_EN_MASK             (0x00000200)
#define FPGA_FIFO_10_EN_MASK            (0x00000400)
#define FPGA_FIFO_11_EN_MASK            (0x00000800)

#define FPGA_FIFO_12_EN_MASK            (0x00001000)
#define FPGA_FIFO_13_EN_MASK            (0x00002000)
#define FPGA_FIFO_14_EN_MASK            (0x00004000)
#define FPGA_FIFO_15_EN_MASK            (0x00008000)

#define FPGA_FIFO_ALL_ON_MASK           (0x0000FFFF)
#define FPGA_FIFO_ALL_OFF_MASK          (0x00000000)





//******************************************* Проверка параметров *******************************************

// Нет

#endif

//*********************************************** КОНЕЦ ФАЙЛА ***********************************************
